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dc.contributor.authorÇavuşlu M.A.
dc.contributor.authorKarakaya F.
dc.contributor.authorBalkoca A.
dc.date.accessioned2019-08-01T13:38:39Z
dc.date.available2019-08-01T13:38:39Z
dc.date.issued2016
dc.identifier.isbn9781509016792
dc.identifier.urihttps://dx.doi.org/10.1109/SIU.2016.7495709
dc.identifier.urihttps://hdl.handle.net/11480/1837
dc.description24th Signal Processing and Communication Application Conference, SIU 2016 -- 16 May 2016 through 19 May 2016 -- -- 122605en_US
dc.description.abstractInterlacing technique aims to lower the costs of high definition video systems by reducing the data amount sent to receiver unit. Regeneration of image at the receiver unit is an important point of interlacing method. In this study, regeneration (de-interlacing) of frames that are sent to receiver unit is implemented by using edge dependent interpolation method. The method is implemented using VHDL on Altera Cyclone-II FPGA. The method avoids reading of redundant data which yields to reduced operation time. Implementation occupies only %3 of the FPGA that is used in this study. © 2016 IEEE.en_US
dc.language.isoturen_US
dc.publisherInstitute of Electrical and Electronics Engineers Inc.en_US
dc.rightsinfo:eu-repo/semantics/closedAccessen_US
dc.subjectDe-interlaceren_US
dc.subjectFPGAen_US
dc.titleImplementation of edge dependent interpolation based de-interlacer on FPGA [Kenar Bagimli Ara Degerleme Yöntemi Kullanarak De-Interlacer Işleminin FPGA Tabanli Gerçeklenmesi]en_US
dc.typeconferenceObjecten_US
dc.relation.journal2016 24th Signal Processing and Communication Application Conference, SIU 2016 - Proceedingsen_US
dc.departmentNiğde ÖHÜen_US
dc.identifier.startpage189en_US
dc.identifier.endpage192en_US
dc.relation.publicationcategoryKonferans Öğesi - Uluslararası - Kurum Öğretim Elemanıen_US
dc.contributor.institutionauthor[0-Belirlenecek]
dc.identifier.doi10.1109/SIU.2016.7495709


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